twin_test.bit (DIP's setup as per twin_test.pdf)
Temporary Flash
CM1: Running at 182.715256 MH/s
CM1: Job interval: 17.805074 seconds
CM2: Running at 181.279004 MH/s
CM2: Job interval: 17.954064 seconds
Notes
CM2 (FPGA3) gets 50-70% less shares than CM1 (FPGA0) (Average Utility of 1.4-1.5 & 0.8-0.9)
Also quite a few of the following errors on both FPGA's
Watchdog triggered: 27276.511018 MHashes without share
Permanent Flash;
CM1: Running at 185.160183 MH/s
CM1: Job interval: 17.556764 seconds
CM2: Running at 185.160183 MH/s
CM2: Job interval: 17.556764 seconds
Notes
CM2 (FPGA3) gets 50-70% less shares than CM1 (FPGA0) (Average Utility of 1.4-1.5 & 0.8-0.9)
Also quite a few of the following errors on both FPGA's
Watchdog triggered: 27276.511018 MHashes without share
The detected Mh/s is completly different each start of the worker, but after some seconds it will show you the correct Mh/s in the website of mpbm.
The Watchdog message come from my changes in the timings, the original timings wait ~3 times longer until it restarts the worker. It could be realy normal to get that message from time to time. But if you can watch the LED's and if you get the message when the orange LED is turned on, you will notice that then it turn off. this is the behavor I had on my board#0015. And my shorten timings make sure the board don't have the orange LED (no work/job) to long.