I really think many are over estimating what a 45nm ASIC is capable of.
This is math. Power consumption varies with the square of the feature size. So when comparing a chip designed at 45nm to a 130nm version of it running at the same frequency and same voltage, there should be a 8x better power efficiency: (130/45)**2 = 8.3
Ask your dad, he will tell you that for 2 identical designs, power consumption will vary proportionally to the transistor junction area.