Are you trying to design a generic SHA256 ASIC, or a Bitcoin mining ASIC?  There's a fair bit of difference there.

If the latter, I'd suggest looking at some of the public documents for the older FPGA miners, Avalon's chips, the data mining software sends to simple chips (i.e. not miners with their own controller board). etc.
For a quick "ahhh", see: http://crypto.stackexchange.com/questions/1862/how-can-i-calculate-the-sha-256-midstate