If you were to submit a proposal for a Masternode vote (when it becomes available) to release an open-source FPGA or ASIC miner it might be possible to gain the support necessary to achieve funding. I don't have the figures in front of me at the moment but I imagine it would require quite a rally in order to be economically viable.
Its a superb project to undertake, sounds like 'OphanedGland' has done the design work, I would consider building a prototype on a test board but I would need the program he has otherwise all the logic will have to be worked out from scratch(possibly do-able) and also some software to get work for the next hash and port it in and out of the FPGA (this, someone else would have to do)
Perhaps a voting proposal to optimize the .bin hashing speed of the miner programs would be more useful and reach more people, (with a number of older chipsets for older graphics cards?)