as scientific as "likely" ....cheers

If we are to be scientists we should perhaps quote guy who said that epoxy is not necessary to re-secure the heatsinks as the glue was there to hold them in place during shipping but I digress...just trying to give SAFE advice to someone who clearly has no idea what they are doing (OP)
SAFE advice could be just an opinion without proper scientific evidence backing it up.
The evidence points that the voltage for some chips are not at their desired levels. It is more likely that it's a SP20 voltage configuration settings or a power supply issue.
0: DC2DC/1/:[vlt1:625 vlt2:629(DCl:794 Tl:629 Ul:688) 54W 87A 73c] ASIC:[110c (125c) 720hz(BL: 720) 91 (E:193) F:0 L:0]
1: DC2DC/1/:[
vlt1:572 vlt2:576(DCl:794 Tl:576 Ul:688) 32W 56A 75c] ASIC:[ 85c (125c) 490hz(BL: 490) 76 (E:193) F:0 L:0]
LOOP[1] ON TO:0 (w:139)
2: DC2DC/1/:[
vlt1:562 vlt2:565(DCl:794 Tl:565 Ul:688) 26W 47A 66c] ASIC:[ 85c (125c) 440hz(BL: 440) 58 (E:193) F:0 L:0]
3: DC2DC/1/:[vlt1:603 vlt2:608(DCl:794 Tl:608 Ul:688) 34W 57A 61c] ASIC:[ 85c (125c) 490hz(BL: 490) 81 (E:191) F:0 L:0]
LOOP[2] ON TO:0 (w:226)
4: DC2DC/1/:[vlt1:666 vlt2:672(DCl:794 Tl:672 Ul:688) 80W 119A 88c] ASIC:[120c (125c) 900hz(BL: 900) 116 (E:193) F:0 L:0]
5: DC2DC/1/:[vlt1:625 vlt2:629(DCl:794 Tl:629 Ul:688) 59W 94A 90c] ASIC:[115c (125c) 770hz(BL: 770) 110 (E:193) F:0 L:0]
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6: DC2DC/1/:[
vlt1:587 vlt2:592(DCl:794 Tl:592 Ul:688) 32W 55A 73c] ASIC:[100c (125c) 480hz(BL: 480) 94 (E:193) F:0 L:0]
7: DC2DC/1/:[vlt1:646 vlt2:650(DCl:794 Tl:650 Ul:688) 66W 102A 76c] ASIC:[ 85c (125c) 820hz(BL: 820) 101 (E:192) F:0 L:0]