You (and Tom) are dreaming if you think it's going to run at 60w. The reason he doesn't want to post his power specs is because he knows they are going to be high.
Why is it attainable for your company but only dream-able for others?
Because BFL is using a 65nm process and Tom is using 130nm? That's a 4x difference in power use right there.
Actually, I'm not sure what Tom is using. Maybe I'm thinking of Avalon. Anyone know for sure?
3, this ASIC will manufacture by SMIC or TSMC. 0.11 or 0.13 process.
There the Avalon feature size has been stated. I don't think I have seen either BFL or Tom/cablepair mention their process feature size.