This is a CSP which typically means there'll be a BGA or LGA style physical interface to the actual chip, in which case the pitch/ball count is what matters the most. Even at 0.5mm pitch and unpopulated areas, that's a lot of balls, many of which difficult to inspect. Would be unnecessary hit/miss soldering jobs, or having to choose to outsource board population for just that part.
The soldering difficulty is way overstated for the mining chips. It is true that the BGA packages have hundreds of contact points. But with a halfway-intelligent design those BGA pads can be easily made quadruple-redundant with double spacing of no-contact pads in-between.
Then the expensive precision placing & soldering & x-ray testing will not be necessary.
All this of course assumes an intelligent designer.
Bad pinout example:
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Good pinout example:
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