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Re: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.)
by
Frizz23
on 29/11/2012, 00:13:17 UTC
How many iterations do you suppose there have been already?  Do you suppose they were all high-volume "bullet runs", each with its own full-wafer mask set?

This whole "bullet run" story Inaba/BFL_Josh told us stinks. You don't pay shitloads of money to bullet run a full lot (batch) of wafers just to figure out that your design is borked. There are always test wafers and test runs first. I am sure BFL did the same.

You don't do trial and error on full lots (50 wafers) scrapping thousands of chips. That would cost you hundreds of thousands of USD. In each iteration. That's just suicide!

Once your chip is OK (working prototype) you go into mass production.

So this shipment date October November December was a lie from the beginning on!

And now you tell us your Asian fab might be a bit untrustworthy. So you might get scammed because you've chosen some backroom fab. That's suicide No.2!

Question for BFL: Why did you fuck us over on purpose with your updates/PR?