OK, those explanations make good sense, and are more or less in line with what I expected.

I imagine that a clock buffer, at one end, receives the signal from a clock source and demodulates it (digitizes it, quantizes it, whatever).  Then, based on its now digital interpretation of the input signal, it creates one or more new signals (maybe it has multiple outputs), which may have different characteristics than the input signal, such as amplitude (voltage), wave shape, and probably a delay (offset) relative to the input signal.

I can see this being does at the board level, but does it make sense also at the chip die level?