Does anyone know what the price of these new chips would be?
Get a mining calculator on the same day the ship is ship-able. Calculate the return the chip generates (at 100 GHash/s) per month with the NEXT (estimated) difficulty. Multiply that number by 8 (this is when it should break even). And there you have it ... the price of one chip.Right now the cost would be:
Next est. Difficulty: 1.52542370411e+11
with 100 GH/s
per month: 0.01003473 BTC
multiplied by 8: 0.08027784 BTC total cost per chip (in a functioning miner ... PSU, housing etc. included) which currently results in 30.45 USD
Enjoy!
But this calculation was good for 28nm chips, so, you need to divide this number by 16(nm) and multiply it by 28(nm).
End result would be $53.28
So, what you guys mean to say is that these chips would cost $30 - $50 /Chip, am I right?
If I assume that the chips cost me $45/chip an I need to achieve a hashing power of 10.2Th/s on immersion cooling I would require 60 chips and these chips would cost me $2700 Whoa!! thats a staggering amount. Between I have my fingers crossed for the prices.
Unless it's a really bad design this chip should cost them about $3 to make (packaged). That's assuming 5 million chip quantities or 500 PH. What will they sell it for? Much more than this, that's for sure but I'd guess they want to give buyers a hope that they can pay back their costs in about 6-9 months, so probably around $8 for volume buyers, $10.50 for the plebs.
The (QFN?) package should be about $0.20 .
This means, if your assumption is right, they would spend about $2.80 for the pure die.
How much is a 16nm wafer? Maybe about $9k if they make a good deal with TSMC?
This would result in about 3200 good dies per wafer. Right?
70000 mm² per 300 mm wafer and assuming 90% yield a single die size would be about 20 mm² (4.5mm x 4.5mm), which would fit to the package size.
8162 rolled cores; 65 clock cycles per hash -> equals about 125 unrolled cores;
A single semi-custom (standard cell based) unrolled core has an area of about 0.3 mm² in 28nm.
Implemented based on unrolled cores in 28nm a chip with equivalent performance would have a size of about 37.5 mm².
Taking the area scaling of a factor of 2 from 28nm to 16nm into account, the unrolled semi-custom version of the chip would have 18.75 mm² in 16nm (but would be probably not that efficient).
So I have to agree, your estimation is feasible and should be close to reality.
