Yes, but this is not much for a mining ASIC even in 22nm. I guess it should equate to about 10 ... 15 unrolled hash cores, because this 22nm GF node is only a 80% shrink of the GF 28nm node, not a true 50% shrink like other 20nm nodes. But therefore the 22nm masks cost only a little bit more than a 28nm mask set.
This is a perfect example of daft thinking of a CAD monkey. No sane hardware engineer would waste that valuable real estate (50 plots of 3 square millimeters each) to fill it out with identical unrolled cores and try to commercially mine with them. The sane engineer would fill those 3 sq.mm with as many different interesting designs as he/she could think of and then compare simulated results with actual results to gauge the accuracy of the toolchain. That is the whole point of prototyping.
I'd assume Hyper is talking about final real estate once some ideas have been tried and weeded through no?
Aside from that, as always seems you do bring up points we can agree on, in this case the necessity of doing more than just sims. Just ask BFL, Cointerra, Bitmine.ch as well as others how well that works (going straight from sims/FPGA work directly onto full silicon with pre-order promised delivered-by date(s)) on the horizon. Despite how the expense looks to accounting and the time required as always abhorrent to MArketing, the need to test ideas with physical silicon cannot be bypassed. Running an assload of smaller (and cheaper) dies gives a chance to test different cell layouts for several different functions to find best and most cost effective of breed to then start integrating together for proto-round-2.
Just like when using SPICE, one cannot always trust what the models say. It's the minutiae of real-world circuitry that never fails to surprise ya from time to time.