Post
Topic
Board Mining (Altcoins)
Re: R9 Nano Modded Rom
by
ldw-com
on 13/05/2016, 09:57:55 UTC
OP, in the XFX BIOS, how do you change the memory voltage?

Does the memory voltage change when the frequency change, like the VCore?

i change it by adding the vddc and mvddc offset in the rom, this because it's standard not there.

Same goes for Fiji, VDDC and MVDDC offset are not standard in the rom, i had to add those myself.

The voltage changes when the frequency changes yes. In other words, that voltage is reduced from every DPM state. Unlike changing every DPM state manually, the voltage controller does this automatically in my case Smiley


So the MVDDC changes when the memory frequency changes? If the frequency is reduced from 1500 MHz to 1000 MHz, how much voltage change?

Yup, memory controller will reduce or raise the voltage needed for a specific frequency. Kind of like vddc but different.

I don't know how much that is though.


Example:
Quote
BIOS PowerPlay State #0:
- Level #0: GPUClock = 1040 MHz, MemClock = 1500 MHz, VID = 4.098 V  (Boot)
BIOS PowerPlay State #1:
- Level #0: GPUClock =  300 MHz, MemClock =  150 MHz, VID = 0.256 V
- Level #1: GPUClock = 1040 MHz, MemClock = 1500 MHz, VID = 4.098 V


------[ ADL GPU Info ]------

Part Number  = 113-2E3243U-X4J
BIOS Version = 015.049.000.004
BIOS Date    = 2015/08/25 04:11
Memory Type  = GDDR5
GPU Clock    = 1040 MHz
Memory Clock = 1500 MHz
VDDC         = 0 mV
DPM State    = 0
GPU Usage    = 22 %

------[ ADL PStates List ]------

State #0: GPUClock =  300 MHz, MemClock =  150 MHz, VID = 0.000 V
State #1: GPUClock = 1040 MHz, MemClock = 1500 MHz, VID = 0.000 V


------[ GPU PStates List ]------

DPM0: GPUClock =  300 MHz, VID = 1.00000 V
DPM1: GPUClock =  500 MHz, VID = 0.95600 V
DPM2: GPUClock =  698 MHz, VID = 0.96800 V
DPM3: GPUClock =  858 MHz, VID = 1.08700 V
DPM4: GPUClock =  899 MHz, VID = 1.13100 V
DPM5: GPUClock =  935 MHz, VID = 1.16200 V
DPM6: GPUClock =  969 MHz, VID = 1.20000 V
DPM7: GPUClock = 1040 MHz, VID = 1.27500 V


Check the lines i made bold. The values in between are calculated by the memory voltage controller.
The only thing i "could" do here is lower the stock mvddc, but in this case, (check second bold lines) it's not possible. Smiley

Greetings