The optimal package for bitcoin hasher would be something like TO-220 with 7 leads:
http://www.psitechnologies.com/products/todo220.phpThe I/O would be serial, the leads would be VccI/O ClkI/O RxD TxD VccHash ClkHash and Reset. Ground would be provided by the heatsink screw pad. One could even omit reset lead by doing serial reset: hold RxD high over (say) 100 I/O clocks.
Well, from the choice of packages (all with many more pins) one can surmise that none of the Bitcoin ASIC vendors obtained the advice from the power-analog and mixed-signal designers.
Chip Specification
Technology Summary:
TSMC 0.11- micron G process
5 Metal
Core Voltage: 1.2 V
I/O Voltage: 3.3 V
Core Frequency: 256+ MHz
Number of Pads: 48
8 Data
40+1 Power
Package Type: QFN48 -0.5 Pitch
Packaged Chip Size: 7 mm x 7 mm
Chip Interface
Data Pins (8 in total):
Clock i
Serial Data In [2] i
Serial Data Out [2] o
Serial Data Bypass [2] o
Reserved [1] -
Having extra pads for power kinda makes sense, but I wonder why they have dual I/O lines.