Avalon went with a very simple chip on a large(110nm) process. I imagine this strategy gave them very high yields out of the wafers because of the small chip size. This came at the cost of a large PCB to route to all the chips.
Well, that's certainly going to be part of the reason. However, take a look at the distance between chips on the BFL board and compare it to the distance between chips on the Avalon board. Now remember Josh's comment about the PCB ground plane not being able to dissipate enough heat due to the thermal density of their design, and how having to redesign the chips to fix this delayed shipping whilst Avalon shipped on schedue using similar QFN chips.
Excellent point. I have minimal knowledge of using the the ground pad and vias to transmit heat through the PCB but it makes logical sense that Avalon would use a larger than electrically necessary PCB to give each chip some buffer from neighboring chips.
Wouldn't this require also the chips be physically farther apart to avoid heat soaking the inner ones? Plus wouldn't moving them farther apart increase the delay while communicating?
I guess a person could just make a huge board and run copper out to the edges but the thermal transfer isn't as effective as a nearer solution. The size of the piece of whatever metal would dictate the maximum amount of heat that would flow at a given thermal difference. It seems like going with a flip chip (ala P3) rather then older QFN would save materials and allow a more efficient board design. By efficient I mean all data would transfer faster going over a shorter connection. Yes short trips nearly speed of light etc but small changes in location on other devices have caused >10% increases in speed.
I think the more compact design would do better if it can be cooled. Thus far I see no reason it can't be cooled.