Having done lots of sub-nm ASIC designs,
You should just license your Zeta-Reticulian technology to us Earthlings. We would be really grateful and give you in exchange almost anything you'll ask and build temples to commemorate your revelation.
It takes only a pi rotation to advance from u to n
You can spare the temples, you earthlings mortals
Geez, no need to be snarky, I was only trying to explain why 2 working units does not necessarily mean you can assume everything is fine.
And for the record, "sub-nm ASIC" is not a technical term, it is the most laymen friendly term used in the semiconductor industry. Just go to TSMC, Intel or anyone else's websites, the first thing they discuss is the node they are using (90nm, 45nm, 23nm, etc). sub-nm is anything below 100 nanometers. BFL is claiming they used a 65nm process, Avalon stated a 110nm process.