Post
Topic
Board Mining (Altcoins)
Re: TRULY Custom RAM Timings for GPU's with GDDR5
by
nerdralph
on 23/03/2017, 14:24:35 UTC
Original Samsung 4G ( your particular GPU ) 1625
555000000000000022CC1C00CE596B44D0570F1531CB2409004AE700 [ 0B03 | 1420 ] 7A8900A003000000170F2E36922A3217

Quote
--> MC_SEQ_MISC1
 -- MR0
    WL = 3,  CL = 22,  TM = 0,  WR = 23,  BA0 = 0,  BA1 = 0,  BA2 = 0,  BA3 = 0
 -- MR1
    DS = 0,  DT = 1,  ADR = 1,  CAL = 0,  PLL = 0,  RDBI = 0,  WDBI = 0,  ABI = 0,
    RES = 0,  BA0 = 0,  BA1 = 1,  BA2 = 0,  BA3 = 0
Original Samsung 4G 1750
777000000000000022CC1C0010626C49D0571016B50BD509004AE700 [ 1405 | 1420 ] 7A8900A003000000191131399D2C3617

Quote
--> MC_SEQ_MISC1
 -- MR0
    WL = 4,  CL = 23,  TM = 0,  WR = 25,  BA0 = 0,  BA1 = 0,  BA2 = 0,  BA3 = 0
 -- MR1
    DS = 0,  DT = 1,  ADR = 1,  CAL = 0,  PLL = 0,  RDBI = 0,  WDBI = 0,  ABI = 0,
    RES = 0,  BA0 = 0,  BA1 = 1,  BA2 = 0,  BA3 = 0

I think you are off by +1 with the MR0 CAS latency.  SEQ_CAS_TIMING has CL=21(0x15) for the 1625 strap, and CL=22(0x16) for the 1750 strap.


Excuse my ignorance, but where is a 22 or 21 on 0x2014030B, or a 23 or 22 on 0x20140514 ?
22 binary is 10110, 21 binary is 10101, 23 binary is 10111, none of those patterns are in any of those two numbers... what am i missing?

The CAS latency in MR0 is just four bits (A3-A6), so it is based on a table lookup.  H5GQ1H24AFR supported all possible latencies from 5 to 20.  Micron's EDW4032BABG brief says "Programmable CAS latency: 6–27", so some latencies in the range cannot be programmed.  I don't have a Samsung datasheet for the K4G4 series (or any Samsung for that matter), so I would have to reverse-engineer the values from the straps by comparing the MR0 values to CL from SEQ_CAS_TIMING.