A change of PoW as a quickfix (to fool currently manufactured ASICS) without too much risk of bugs can be as follows:
Instead of checking for n zero bits, implement checking for n one bits instead.
If you are bold, you can have the sequence of leading bits to check to be dependant on the trailing bits of the previous block.
Your first suggestion seems to be the simplest thing which would actually work.
But I also like the 2nd one!
An automatic full PoW switch trigger on extremely anomalous conditions.
An option worth considering on all doomsday machines....
https://en.wikipedia.org/wiki/Dead_Hand_%28nuclear_war%29