One of my friends and I are working on designing the PCB (he knows how to do it an stuff) so once I get that, I will be adapting the opensource FPGA miner to run on it (we will be using 2x Atrix-7)
will make a thread in proj dev to keep you all updated.
I just updated the repo with a DSP48E1 design, for Kintex 7. 400MH/s using 80% of the DSPs, and ~25% of random logic. I don't have an Artix-7 to port to, but I think they also have DSP48E1's. I plan to start revamping the code base to better support multi-core designs and standardize the communication modules. Hope to get my Kintex up to at least 1GH/s by throwing in two regular hashing cores.