I have my own Scrypt code for Xilinx FPGA and a pluggable rack system, that takes 10 boards, I had to mux them as 8+2 hot spares.(yep sometimes they drop in & out of service randomly)
Unfortunately...
Performance is shite...... insofar as comparison to high-end CPU or GPUs.
Who knows if I can get an improvement but it is going to be very hard to beat the GPU thrughput Vrs cost.
Unfortunately...
Performance is shite...... insofar as comparison to high-end CPU or GPUs.
Who knows if I can get an improvement but it is going to be very hard to beat the GPU thrughput Vrs cost.
Interesting. Thanks for the detailed post, especially the last part where you share your results.
This is good news as far as I am concerned, the whole point of Litecoin using Scrypt was so it would be difficult for specialised hardware to have a massive performance edge.
K some VERY VERY preliminary verifiable measurements. (verifiable from my side).
Iv'e had code for some time that takes about 1ms to do ONE round (no laughing at the back there), which would make it about a 1kh/s.
This is actual code on an FPGA, yes it has not been optimized yet and yes it is a SINGLE core.
I had not done any work on it, purely because I was working on a 'crypto job' for someone else.... then there was the work on getting the Bitcoin FPGA code operating at a higher level, currently thats clocking about 350MH/s on a xilinx, with bitcoins at a stupid level, and the fact that BFL & TOM both shafted me on deliveries of ASIC kit it is about priorities.(beer money)
Since I recently took a slagging down on IRC about what some called 'stock images' that I : "had modified so they could not be google searched" , there were requests for a special 'proof' message which I have included specifically for the IRC doubters.
This is not a 'get rich quick scheme' but rather a pure research task, possibly the first images of an FPGA product running litecoin.
Crypto currencies are of interest to me, but I really will be surprised if people can break into high double figures with a single core on an FPGA.