NO!! Don't confuse
gate with
LE (logic element). Older fpga's often quoted a gate count (such as the one you linked to Spartan 3E 250K gates). Newer fpga's use a Logic Element (or Logic Cell) count (and google tells me there are 12 gates to a LE). So a Spartan 6 LX150 with 147,443 logic cells roughly equates to 1.7 million gates by my calculation (I can't find any direct quote for the actual figure, so take that as very approximate). You can see the spartan family spec at
http://www.xilinx.com/support/documentation/data_sheets/ds160.pdfThe board you linked to will be (almost) useless for mining. You need to look for a purpose-built Spartan LX150 based miner and use the firmware (bitstream) that comes with it (and even then the economics look pretty grim).
If you want to compile your own bitstream for the Spartan series, you can download free software from the Xilinx web site
http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm but beware that it is limited to the smaller devices (LX75 maximum I think, but do your own due dilligence). You need the full (very expensive) version to compile for the LX150.
Regards
Mark
Ah, Sorry for my newbishness, never played with one of these devices (blame the 2 companies for their heavy secretive efforts unless you buy their $5000 suite)
my mistake, so when a company quotes "Gates" number, i have to look for ALM, LE, Slice etc?
Basically i want to know what a full miner roll out fits on, how many LEs i'll go to digi-key and look something up and go from there