NO.... I cannot see FPGA beating 8750 or 8790

But the real issue is no one is sharing any Litecoin FPGA figures, considering all these 'prototypes' floating about ......
It is the  'Tom'/ BFL fuckfest all over again..........

Personally I have great difficulty believing some of the figures that are being bandied about for litecoin FPGA. I've see statements such as

"Spartan6 XC6SLX150 fits only 8 scratchpads. If BRAMs are not used for bitcoin computations, it is possible to implement LTC mining for XC6SLX150 at about 50 - 100 kh/s per chip with about 80% of slices free."

Quite frankly  I find this very difficult to believe.. Because I'm seeing figures of about 3k flipflops & 5k =LUTS for a SCRYPT engine.

Xc6SLX150 is specd at  23,000 slices  each slice contains 4 LUTS & 8 FF
so ~23,000*4 =~98k LUTS

So just taking into account the LUTS:
 8 cores = 8*5k =~40k LUTS, which in no way leaves "about 80% of slices free", and NO way am I seeing anything near 100Kh/s.

To have ~80% free you would need to implement 8 engines in ~20k LUTS ,~2.5K LUTS per engine.
Sorry but  for a SCRYPT engine I have to call bullshit...

Then suddenly I see this sort of thing in the same discussion.
"multiple smaller DRAM chips working in parallel will do best job... Allowing about 500 mega-transfers for low-cost / mid-cost fpga, that is 500 giga-bits per second or 60 gigabytes per second. Overall cost of DRAM will be about 150 EUR- and of FPGA to handle that about 300 EUR-. If works in fully-pipelined manner it would give about 500 kh/s mining performance for litecoin application."

So  ABRACADABRA... we have a  5 fold increase in performance,  and not a SINGLE analysis on actual cycle times any place to be seen.