Thank you. I actually saw that article when looking for information on what spacing and how many to use. I came across an industry forum post that discussed the spacing based on past board experience where 1.5mm was indicated as a good value. I thought about using 5 or 6 rows/cols as that would be maximal in line with the first article for a 7mm chip. 1.5mm spacing on a 10mm die would be about 7x7 equivalent, 85% reduction in resistance.

I figure it would take me an hour to revise them to smaller spacing at 5x5 or 6x6, and I may yet do that if information turns up that it would work much better. I believe there is a limit to via count on board production as well, and from what I recall even 6x6 wouldn't push past that. What held me back was thinking that too many holes would weaken the board structure. My fab has a 0.3mm minimum drill size so I can't make the holes smaller when spacing closer. With laser vias you can make smaller holes on much closer spacing. That would also push up the board cost considerably as I read they charge by the hole.