Here's a teaser. I've done just about as much as I can for the moment.
I could tidy it up a bit and make some bits more pretty.
If I recall correctly this is the top and bottom layers with solder paste.
The middle layers aren't shown. Note that data signals will be on a middle layer.
And I'm still playing with the connector area. I may put pads for an SMD barrel jack at board edge next to PCIe power so that those who want no thru holes (due to heat sink) can use that. I could find no SMD mount PCIe connectors so best bet there is to drill the heat sink or put copper pads between it and the board. Kind of a nuisance really.
I should have changed the name of that silly 1PIN hole footprint.
If you can, i'd recommend adding fiducial markers on the silkscreen, both a few on the corners of the board, and local ones by each QFN [dot by pin 1]. for the board ones you can do a circle of copper on the top layer (with no soldermask) as wellI could tidy it up a bit and make some bits more pretty.
If I recall correctly this is the top and bottom layers with solder paste.
The middle layers aren't shown. Note that data signals will be on a middle layer.
And I'm still playing with the connector area. I may put pads for an SMD barrel jack at board edge next to PCIe power so that those who want no thru holes (due to heat sink) can use that. I could find no SMD mount PCIe connectors so best bet there is to drill the heat sink or put copper pads between it and the board. Kind of a nuisance really.
I should have changed the name of that silly 1PIN hole footprint.
Also i've been reading a few design notes on QFN heatsinking - it might be worth using 2 or even 3oz copper on the internal ground plane for added heat conduction, but i need to do some testing more more reading - just something to be aware of
How are you doing the layer stackup? Which layer is the power/ground plane?