I would suggest a higher density of vias for the thermal pad. Here is an example of ones that we do for power drivers.
Definitely if possible, but there's a diminishing return for # of vias though, something around 12-14 vias for a 7x7mm QFN. Going to say 25 might only be a 10% increaseI'll try to put together some links to design guides on these and thermal analysis.
It would be very nice if we could vary the clock and core voltage in case some of the chips have a worse thermal resistance than others and heat up -- mostly for DIY people who will get inconsistent reflow between the thermal pad and the PCB. they could at least declock and/or de-volt the QFNs so they don't burn themselves up.
better to have 50% output performance than 0%.