I have a rudimentary design right now. It is the circuit in gate array format that I designed. It is not a final design by any means, but it allows me to identify the key bottlenecks of the system, calculate gate propagation, maximum clock speed, etc. So what I have from this is; 8MHz clock, 1 hash per clock, and 100 pipelines. This could fit on low volume production run for 27$ / ASIC from TSMC. You then need to add the cost of shipping, putting it on a PCB board and add a controller, + design cost for the lithography. So basically, 800 Megahash/s, for 57$ or so (+ design costs spread across the production line). And that is without the optimization to the main bottleneck (a 7 input adder) that I am working on. So it is encouraging.

You can easily add 4-5 ASIC on each PCB board improve the Hash/$ ratio. So, with 5 ASIC per board, you would get 4GIGAHASH/s for 165$ (+ design cost). (the price of a 5850). Essentialy it makes gpu mining obselite.