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Board Hardware
Re: Official Open Source FPGA Bitcoin Miner (Last Update: April 14th, 2013)
by
xbaby
on 08/05/2013, 11:12:48 UTC
Quote
I'd like to ask what optimization options need to use to achieve > 190MHz clock speed? please help me, thanks very much.
The project won't "just compile" and achieve >190MHz.  Getting timing that high requires using Xilinx's SmartXplorer to brute force it.

Thanks for you hint. I've already tried SmartXplorer with default 7 built-in strategies, but can't achieve above 160MHz result. so, you mean I should use the cost table method to brute force it? thanks.