Post
Topic
Board Securities
Re: ASICMINER: Entering the Future of ASIC Mining by Inventing It
by
VJain
on 10/05/2013, 03:33:41 UTC
Update

A lot of great thing happened last week. We wiped over the obstacles (infrastructure and paperwork) on deploying and put a lot of our available hashrate online. We also did a significant improvement (power, design, appearance) on the USB stick from the sample batch to the production batch.

For the discussion in the last few days, what we... I could say, is only that our IC design team had achieved fantastic results, as everyone could see and compare, with the most limited funds (barely more than 100k$ raised last August) and most inferior mask-set of choice (130nm which belongs to the antiquity era), and I'm proud of it.

Excellent!

What does the future hold for us?  Will AM invest in a next-gen chip using 28nm or 32nm?  I have a vague idea that chips with a smaller nm mask set are more efficient in terms of power requirements, but I don't really understand what sort of economic forces would make a next-gen chip based on 28nm or 32nm (or others, smaller than the current fab using 130nm) desirable.  So, anyone that knows more about this, please chime in!

Wouldn't going to a smaller fab size [potentially] also increase watt / nm^2? Kind of like Intel's Ivy Bridge - and cause heating issues? Also, I'd assume doing this would also greatly increase the cost/delays of getting the chips made due to higher demands for the newer arch.