-collecting numbers in this post here-

1) Junction to chippackage 0.001K/W
2) Solder layer between chippackage and board 0.01K/w
3) Board with 25 vias 3.8K/W
4) Thermal paste between board and aluminum 2.5K/W

Watercooling:
5a) X mm aluminum
6a) Aluminum to water
--> I'll simplify this to "T_alu = T_water"
7a) Radiator with/without fan to air 0.25K/W


Aircooling:
5b) Heatsink with/without fan to air 0.5K/W


2w per chip
5x5mm for 2) and 3)
somewhat larger area for 5a) 6a) and 5b)



This tutorial was posted earlier, it has almost all answers already:
http://www.electronics-cooling.com/2004/08/thermal-vias-a-packaging-engineers-best-friend/

1) Silicon to chippackage: 0.001K/W

2) As shown on the thermal imaging here:
https://bitcointalk.org/index.php?topic=190731.msg2043405;topicseen#msg2043405
I calculate with a delta of 7K between chip and board (62°C and 55°C respectively).
This assumes the soldering and boardsetup is comparable between Avalon and Klondike.
--> Nah, 3.5K/W is waay too high. The tutorial says 0.008K/W, 0.01K/W seems more realistic here. We don't use the length of the board for heat transportation, but the thickness!

3) 5x5mm area with 5x5 grid of vias, each 0.3mm diameter.
Bottom layer is 1 oz. copper
electronics-cooling says 3.8K/W with a 5x5 grid of vias (at 2mm spacing though, ignored)

4) https://en.wikipedia.org/wiki/Thermal_grease says 0.5K/W @ 12.6cm², which calculates to 2.5K/W for our 5x5mm area.

5b) I randomly found a value of 0.3K/W for a CPU-cooler with a fan. Let's calculate with 0.5K/W for our non-sophisticated DIY solution.

7a) Found 0.21..0.35K/W for a 12cm radiator. The larger the radiator, the wore heat gettin' rid of. I'll use 0.25K/W here, although this value is pretty random - can be reduced at will with more/larger radiator.

..I'll calculate a bit with those values later.


Ente