My plan is to code a detect function that sequentially feeds a known "golden" data set to each chip and listen for the nonce returned. So this would be hard coded into the firmware. Mostly this is to test chip presence and function. However, by using a nonce that is X hashes away from golden, a brief timing of the result could give you actual speed. I wasn't planning this for now as the calculations would be more difficult on a PIC than using pre-calculated tables.

What I have partly coded is an array [8] of nonce base count, timer divider, and tick count values. So when detecting eg. 5 chips per bank I use that value to choose that I'll send N = 2^32 / 2 / 5 as base count for each range. So nonce1 starts 0, nonce 2 starts N, nonce 3 starts N+N, etc. Then I have a counter that runs at 12MHz / 256 / X value where X is set based on hash clock config. This would be chosen to tick very close to every 256,000 hashes and should be reliable. Now I count these ticks, and for current chip count I compare to the table value to decide when to push more work. This should find me pushing new work just before the end of each nonce range is reached, and have a tick count value for work aborts that allows reporting how far we got within 256,000 hashes.

What I could use is a reference to code into the firmware. I realize that any new block would have valid values. I thought it may be nice to code in a special one. eg. midstate all zeros or data 0xdeadbeef... etc.