I noticed that on their linux machine, they even had a seperate console utility to monitor the status of all the FPGAs (temp, current, power usage etc), this means that they have a whole suite of FPGA related design platform, and they just fit bitcoin's hashing function into that platform
And they said they are not going to have an ASIC prototype, just replace the FPGA with standard cell ASIC and direct go for mass production. I think this is risky, without a prototype, how can they sure all the heat and power usage fall in a reasonable level? Unless they have done this many times before, they might encounter what BFL experienced last year
Why u dont ask them?
as i understood it they are experienced with heating/cooling problems and approaching it with being flexible in both the number of chips used per device and extend of load on each chip in an overall modular setup.
As I remember, the first set of BFL wafers (last December) just went to trash bin because it either over current or over heat, no way to make them work, then the second set wafers (this February) ran at half of the designed frequency and still draw double amount of current than simulation results, so only 2 of those chip can be powered and sit in a box that originally designed for single SC. Now they have rest of the wafer using a different metal layer implementation and further improved the power draw and heat, but still by no means reached their original claim of 1w/Gh, more like 5W/GH
But anyway knc's estimation is 3W/GH, that is quite reasonable for a 28nm chip