I've just recieved a sample avalon asic! 
Just to let you guys know what I've been working on lately.
I'm making an Eagle library for the symbols and footprints for the ASIC cards. And I'm pretty far along with that.
After that I'll start working on the layout of those boards.
I've got some pretty cool digital calipers and used those to check part dimensions.
- I noticed that the exposed pad dimensions from the datasheet were correct, not those from the package pdf they added later in their github. 4.7 x 4.7 instead of 5.4 x 5.4
- The contacts wrap around. Sometimes QFN packages just put a marker on the side to indicate a contact location. This is good, it will make handsoldering a whole lot easier
Here is a badly edited and photographed impression of the chip I got.
http://s11.postimg.org/xry5mo1g3/Avalon_ASIC_sample.jpg
Just to let you guys know what I've been working on lately.
I'm making an Eagle library for the symbols and footprints for the ASIC cards. And I'm pretty far along with that.
After that I'll start working on the layout of those boards.
I've got some pretty cool digital calipers and used those to check part dimensions.
- I noticed that the exposed pad dimensions from the datasheet were correct, not those from the package pdf they added later in their github. 4.7 x 4.7 instead of 5.4 x 5.4
- The contacts wrap around. Sometimes QFN packages just put a marker on the side to indicate a contact location. This is good, it will make handsoldering a whole lot easier
Here is a badly edited and photographed impression of the chip I got.
http://s11.postimg.org/xry5mo1g3/Avalon_ASIC_sample.jpg
