Post
Topic
Board Hardware
Re: Klondike - 16 chip ASIC Open Source Board - Preliminary
by
freeworm
on 09/07/2013, 10:06:51 UTC
Todays snapshot:

RC delay, 100 ohm, 220pF, 2 NOR gates with trailing edge circuit.
Looks like a good capture and gives better results but I'm still seeing HW errors, though not so many now.



Your clock signal is great with very sharp rising/falling edge. I am wondering how you made it.
I simply added a NOR gate after the RC delay (100 ohm, 220pF) of your original circuit, but the signal is not as good as yours. The rising / falling time is much larger than yours and the pulses are broader.
It's better than the original circuit but I still get HWs.