This sounds good. So when a chip fully stops working all others remain working.
If one chip
fully stops working and does not forward messages, all chips from that defective one to the end of that row will not function.
If that defective chip still forwards messages, only its hashes are dropped (hw errors).
Oh... rest of the stack... I thought that means the remaining 9. Now the question is how often chips break. I guess overclocking will raise that probability.