Post
Topic
Board Hardware
Re: ASIC flexibility
by
Silverpike
on 22/07/2013, 03:40:07 UTC
I can answer this question for the ASIC implementations.

I believe that many existing ASIC implementations assume the rest of the bitcoin header after the nonce to be a fixed constant. I cannot speak for Avalon specifically, but I'm aware of several ASIC designs that will fail to work if the header is extended with non-constant data after the "2nd round" 16 bytes.

Is this proposal being seriously considered, or is this a what-if question?