I want to use only 1 thread per physical core on both the CPUs, but I'm not able to do it.
Use the tool I've posted a few posts above (
msg27696971) to identify physical cores, and then use the appropriate affinity mask.
Do not underestimate the correct affinity setting, some algos (like lyra2*) are spread between all cores if
thread count < core count, e.g. u have 4 cores but wanna use 2 threads, than u may get all 4 cores 50% utilized, and that is not what you usually want :-)
...
Thank you for you suggestion.
Here is the output of enum tool from AMD
C:\Users\Administrator\Desktop\enum>enum -more
Local APIC Id= 0
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x0
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 1
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x0
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 2
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x1
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 3
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x1
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 4
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x2
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 5
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x2
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 6
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x3
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 7
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x3
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 8
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x4
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 9
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x4
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 10
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x5
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 11
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x5
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 12
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x6
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 13
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x6
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 14
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x7
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 15
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x7
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 16
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x8
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 17
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x8
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 18
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x9
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 19
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0x9
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 20
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xa
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 21
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xa
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 22
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xb
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 23
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xb
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 24
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xc
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 25
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xc
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 26
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xd
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 27
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xd
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 28
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xe
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 29
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xe
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 30
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xf
nCoreId = 0x0
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Local APIC Id= 31
nApicIdCoreIdSize= 0
HTT = 0x1
nLogicalProcessorCount = 0x10
CmpLegacy = 0x0
nNC = 0x0
nMNC = 0x1
nProcId = 0xf
nCoreId = 0x1
nCPUCoresperProcessor = 0x1
nThreadsperCPUCore = 0x10
Physical Processor ID 0 has 2 cores
as logical processors 0 1
Physical Processor ID 1 has 2 cores
as logical processors 2 3
Physical Processor ID 2 has 2 cores
as logical processors 4 5
Physical Processor ID 3 has 2 cores
as logical processors 6 7
Physical Processor ID 4 has 2 cores
as logical processors 8 9
Physical Processor ID 5 has 2 cores
as logical processors 10 11
Physical Processor ID 6 has 2 cores
as logical processors 12 13
Physical Processor ID 7 has 2 cores
as logical processors 14 15
Physical Processor ID 8 has 2 cores
as logical processors 16 17
Physical Processor ID 9 has 2 cores
as logical processors 18 19
Physical Processor ID 10 has 2 cores
as logical processors 20 21
Physical Processor ID 11 has 2 cores
as logical processors 22 23
Physical Processor ID 12 has 2 cores
as logical processors 24 25
Physical Processor ID 13 has 2 cores
as logical processors 26 27
Physical Processor ID 14 has 2 cores
as logical processors 28 29
Physical Processor ID 15 has 2 cores
as logical processors 30 31
Number of active logical processors: 32
Number of active physical processors: 16
Number of cores per processor: 1
Number of threads per processor core: 16
I'm assuming that using an affinity mask like 0xAAAAAAAA or 0x55555555 it will use only odd or even logical processors of the 32 available. Am I wrong?