Hi,

What is the end target of your project?

1) Mine on FPGA's (meaning you think you can actually think of a way to optimize the design to a point where it becomes efficient)?
2) This will be a prototype for a ASIC implementation
3) It's just for fun

22$/MHash/s right now (165 MHash/s on a 3777$ chip)...not competitive but you gotta start somewhere (just being able to make something that works from scratch is impressive, good job). I think it does not matter as long as you have a plan in mind to make it efficient enough.