So theoretically eASIC would be a partner for a standard cell ASIC too. But I would not choose them for a 28nm implementation, because they have no proven first time right tape-outs in this technology node and there is a hard learning curve for that kind of implementations.
Which might make one wonder: might a state machine with extremely low complexity and a simple, established core process be a good application with which to try to prove one's chops? Just speculatin'...