Well given that sASIC exist with 10x to 20x as much memory (as in on die negligible latency SRAM) as required for "LTC Scrypt" I don't see the "128KB barrier" being much more than paper thin.
It boils down to requiring more chips instead of more memory, and each of these chips must have access to a small amount of fast memory. Cost to build, electricity usage, etc. are still factors in play and there is no "slam dunk" that this is a more or less effective way to be ASIC-resistant.
The only real barrier is that the market cap (and thus annual mining revenue). It is still laughably low.
$50m is laughable?
LTC (et all) could have been memory hard but they chose (either by negligence or malice) to set the "barrier" incredibly low. The minimum recommendation by the AUTHOR (not some random guy but the guy who wrote it) is ~20MB of scratch pad. LTC chose to use ~1% of that.
The security of the network is not at risk because of the scrypt parameters chosen. Do not imply that it is.