This is hilarious... I actually have some BFL hardware and even I think this means they are finished.. They are obviously trying to move payments to a medium that cant be refunded (bitcoin or wire xfer). They are using a design which alot of us *know* cannot dissipate that much heat, and they are moving at a snail's pace with current orders.
Guys... Ive never said this before, but i believe they are on the virge of folding and taking anyone who preorders money with them..
Regarding power consumption,
Radeon 5970 and 5870 both consume more power than our card does, the very reason we took this design approach.
TDP of 5970 is 294W and 5870 is 224W. The card is reported to be 350W which is significantly higher not lower.Also this pretends away the challenges of the form factor and ignores it was AMD with three decades of experience, and the HD 5000 series was their 12th generation of graphics cards. AMD/ATI's first graphics card looked like this and consumed 10W.

Even AMD isn't immune to the challenges of working in a compact unforgiving form factor, the 7990 (375W TDP) was delayed by six months due to power/thermal issues that they found challenging to resolve.
While 350W is
possible in that form factor one would have to be willing to bet that unlike every other time the simulations aren't lower than reality AND that the company doesn't run into any cooling/power problems due to the extremely high energy density. As for 350W being conservative? I don't see it. 350W is 0.6 w/GH. BFL current chips are 3.1 w/GH correct? A die shrink conservatively means at best a 40% reduction in power (miners tend to be always on so we are really only interested in active load). 28nm is two die shrinks from current chip. So 3.1 w/GH * 0.6 * 0.6 = 1.1 w/GH. If the current generation was just a die shrink (Intel's tick/tock strategy) we would be looking at 1.1w/GH (660W for this card). You stated you will both shrink and optimize (something Intel split up to reduce risk) but that is a rather significant optimization wouldn't you say? Nearly an 86% (1.1/0.6) improvement in performance per watt outside what is gained from the die shrink. Intel (that small rookie ASIC designer) is happy for a 10% improvement in performance per watt from architectural changes.
Given the aggressive improvement in performance per watt necessary, combined with the lack of any headroom (if it misses by even 20% then it can't be cooled in that form factor at that speed),
it would need to be a nearly flawless design and execution from start to finish.
It certainly "can" be done (it isn't beyond the theoretical limits of silicon on forced air cooling) but given BFL past promises on power and cooling well one would be betting that "this one will be different".