Sure, a 128 bit quad channel bus is effectively a 512 bit bus. AMD and Nvidia have used 512 bit buses in the past, however they both have moved away from those due to high cost and high power consumption. If Bitmain's ASIC really does have a separate 512 bit bus for each core (so 18x 512 bit bus in total), then 200+ MH/s is possible. However, in that case the retail cost and the power consumption will be pretty high. I'm sure they wouldn't release anything that's worse than a comparable GPU rig but most likely it's not going to drive GPU rigs out of the market either.
Not entirely true - HBM and HBM2 are both quite a bit wider.
True but HBM actually doesn't use a memory bus in the traditional sense since the memory is located on the same physical die. It's more like a huge EDRAM. So it's a completely different technology and not really comparable. It's also rather expensive.
But that's not really the point, the point is putting 18 separate 512 bit memory buses on a board is expensive and I wonder if Bitmain has really gone that route and how are they planning to do it cost effectively.