QFP 44 is a bit smaller than the packaging used by competitors (= more W/mm²) and no exposed heat pad basically means the heat is kinda trapped in the packaging.
Not exactly. The W/mm
2 issue has to do with the size of the
physical chip, not the size of the packaging. There's only so much heat that can be removed from silicon for a given temperature gradient. For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon.
TL;TR: I think the sample chips will underperform greatly in comparison to the original announcement and might only hash at 1,5-1,7 GH/s/chip. This relates to a power consumption of 4-4,5 W which would approximately match a deployment of 3 TH/s+ with 2000 chips.
Disclaimer: I'm not really familiar with this topic at all, but I tried to connect the given dots.
Yes, I think this is correct. They expect 2,000 chips and 3-4H/s. That comes out to just
1.5-2gh/s/chip, not 4.8. So they are already expecting about half the theoretical max output of their chips. And, at 2.7W/gh/s, that comes out to
just 4-5.4W, not 12.8.
4.8Gh/s and 12.8W may be the design capacity of their chips.
Their recent announcement of 2,000 chips, 3- 4TH/s, and 2.7W/Gh/s comes out to just 1.5 to 2Gh/s and 4.05-5.4W per chipIt's likely that cooling system you'd need to use to get 4.8Gh/s is just more expensive then simply using two chips at half the power.
