Post
Topic
Board Mining speculation
Re: Intro: U.S.-based ASIC design group w/ patent on reducing electrical consumption
by
cointastical
on 23/02/2018, 21:53:41 UTC
Here is more information about the technology and company:

- https://docs.wixstatic.com/ugd/b454a1_c0652f38a20c438eb9ab474bab1878ba.pdf

3B’s novel Unipolar Logic Circuit (ULC) - advantages:
- Enables NMOS or PMOS logic as low as 50% of CMOS power consumption
- Enables simpler fabrication of circuits – only NMOS or PMOS transistors, thereby reducing fabrication cost
- Reduces transistor count compared to conventional CMOS logic, thereby increasing operational speed and reducing power consumption and fabrication cost of logic circuitry
- Enables higher clock speeds compared to conventional CMOS logic or other unipolar logic schemes
- High density < 20F2 novel vertical unipolar logic gates
- Circuit validated via simulation on IBM 500nm and 90nm CMOS process nodes