We know that we're tight with the time but we will publish every document as soon as it will be available. The coming week we'll work on the FPGA chain prototype that will have exactly the same frontend code as the ASIC, that would be enough to start to work on the drivers. The IC packaging house is also finishing the drawings of the custom IC package that we'll use on the A1. This will make things a bit more challenging than a simple QFN, but we wanted a custom design built from scratch to withstand the specific characteristics of a bitcoin mining chip while still being cheaper than QFN.