Hello,
When I run T9+ it works fine several hours, after that hash rate on one chain drops to 96 aproximatly, only work 2 chips. Then I reboot the device and it works fine for several hours and then again hash rate drops on the same chain. I will post kernal log. On miner status all chips are showing "o", temperatures are max 78 C. I flashed firmware and its the same. Also two chips on other chain hashing 0. Does anyone knows what is causing the problem?
Thanks in advance.
Kernel Log
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-xilinx-gb190cb0-dirty (lzq@armdev2) (gcc version 4.8.3 20140320 (prerelease) (Sourcery CodeBench Lite 2014.05-23) ) #57 SMP PREEMPT Fri Dec 9 14:49:22 CST 2016
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Xilinx Zynq
[ 0.000000] cma: CMA: reserved 128 MiB at 16800000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] On node 0 totalpages: 126976
[ 0.000000] free_area_init_node: node 0, pgdat c0740a40, node_mem_map debd8000
[ 0.000000] Normal zone: 992 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 126976 pages, LIFO batch:31
[ 0.000000] PERCPU: Embedded 8 pages/cpu @debc1000 s9088 r8192 d15488 u32768
[ 0.000000] pcpu-alloc: s9088 r8192 d15488 u32768 alloc=8*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 125984
[ 0.000000] Kernel command line: noinitrd mem=496M console=ttyPS0,115200 root=ubi0:rootfs ubi.mtd=1 rootfstype=ubifs rw rootwait
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Memory: 364356K/507904K available (5032K kernel code, 283K rwdata, 1916K rodata, 204K init, 258K bss, 143548K reserved, 0K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xdf800000 - 0xff000000 ( 504 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xdf000000 ( 496 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc06d1374 (6949 kB)
[ 0.000000] .init : 0xc06d2000 - 0xc0705380 ( 205 kB)
[ 0.000000] .data : 0xc0706000 - 0xc074cf78 ( 284 kB)
[ 0.000000] .bss : 0xc074cf84 - 0xc078d9fc ( 259 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP.
[ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] ps7-slcr mapped to df802000
[ 0.000000] zynq_clock_init: clkc starts at df802100
[ 0.000000] Zynq clock init
[ 0.000015] sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 3298534883328ns
[ 0.000310] ps7-ttc #0 at df804000, irq=43
[ 0.000621] Console: colour dummy device 80x30
[ 0.000652] Calibrating delay loop... 1325.46 BogoMIPS (lpj=6627328)
[ 0.040209] pid_max: default: 32768 minimum: 301
[ 0.040437] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.040455] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.042642] CPU: Testing write buffer coherency: ok
[ 0.042988] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.043049] Setting up static identity map for 0x4c4af8 - 0x4c4b50
[ 0.043270] L310 cache controller enabled
[ 0.043290] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
[ 0.121038] CPU1: Booted secondary processor
[ 0.210227] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.210361] Brought up 2 CPUs
[ 0.210380] SMP: Total of 2 processors activated.
[ 0.210389] CPU: All CPU(s) started in SVC mode.
[ 0.211085] devtmpfs: initialized
[ 0.213494] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.214743] regulator-dummy: no parameters
[ 0.223714] NET: Registered protocol family 16
[ 0.226028] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.228343] cpuidle: using governor ladder
[ 0.228356] cpuidle: using governor menu
[ 0.235847] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered
[ 0.237356] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.237370] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.237479] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xdf880000
[ 0.259711] bio: create slab at 0
[ 0.261714] vgaarb: loaded
[ 0.262443] SCSI subsystem initialized
[ 0.263343] usbcore: registered new interface driver usbfs
[ 0.263518] usbcore: registered new interface driver hub
[ 0.263742] usbcore: registered new device driver usb
[ 0.264273] media: Linux media interface: v0.10
[ 0.264430] Linux video capture interface: v2.00
[ 0.264678] pps_core: LinuxPPS API ver. 1 registered
[ 0.264690] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti
[ 0.264816] PTP clock support registered
[ 0.265183] EDAC MC: Ver: 3.0.0
[ 0.266238] Advanced Linux Sound Architecture Driver Initialized.
[ 0.269216] DMA-API: preallocated 4096 debug entries
[ 0.269230] DMA-API: debugging enabled by kernel config
[ 0.269318] Switched to clocksource arm_global_timer
[ 0.290495] NET: Registered protocol family 2
[ 0.291190] TCP established hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.291247] TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.291333] TCP: Hash tables configured (established 4096 bind 4096)
[ 0.291384] TCP: reno registered
[ 0.291403] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 0.291437] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 0.291693] NET: Registered protocol family 1
[ 0.292028] RPC: Registered named UNIX socket transport module.
[ 0.292040] RPC: Registered udp transport module.
[ 0.292049] RPC: Registered tcp transport module.
[ 0.292057] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.292071] PCI: CLS 0 bytes, default 64
[ 0.292534] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
[ 0.294594] futex hash table entries: 512 (order: 3, 32768 bytes)
[ 0.296781] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 0.296974] msgmni has been set to 967
[ 0.297768] io scheduler noop registered
[ 0.297781] io scheduler deadline registered
[ 0.297823] io scheduler cfq registered (default)
[ 0.306774] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208
[ 0.306795] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
[ 0.432479] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 82, base_baud = 3124999) is a xuartps
[ 1.000016] console [ttyPS0] enabled
[ 1.004299] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to df866000
[ 1.011953] [drm] Initialized drm 1.1.0 20060810
[ 1.029111] brd: module loaded
[ 1.038544] loop: module loaded
[ 1.048073] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
[ 1.054086] e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
[ 1.062033] libphy: XEMACPS mii bus: probed
[ 1.066402] ------------- phy_id = 0x3625e62
[ 1.071398] xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
[ 1.080077] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 1.086700] ehci-pci: EHCI PCI platform driver
[ 1.093998] zynq-dr e0002000.ps7-usb: Unable to init USB phy, missing?
[ 1.100840] usbcore: registered new interface driver usb-storage
[ 1.107687] mousedev: PS/2 mouse device common for all mice
[ 1.113837] i2c /dev entries driver
[ 1.120753] zynq-edac f8006000.ps7-ddrc: ecc not enabled
[ 1.126242] cpufreq_cpu0: failed to get cpu0 regulator: -19
[ 1.132178] Xilinx Zynq CpuIdle Driver started
[ 1.137046] sdhci: Secure Digital Host Controller Interface driver
[ 1.143220] sdhci: Copyright(c) Pierre Ossman
[ 1.147488] sdhci-pltfm: SDHCI platform and OF driver helper
[ 1.154315] mmc0: no vqmmc regulator found
[ 1.158333] mmc0: no vmmc regulator found
[ 1.199341] mmc0: SDHCI controller on e0100000.ps7-sdio [e0100000.ps7-sdio] using ADMA
[ 1.208022] usbcore: registered new interface driver usbhid
[ 1.213532] usbhid: USB HID core driver
[ 1.218243] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[ 1.224541] nand: Micron MT29F2G08ABAEAWP
[ 1.228511] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[ 1.234453] Bad block table found at page 131008, version 0x01
[ 1.240677] Bad block table found at page 130944, version 0x01
[ 1.246734] 3 ofpart partitions found on MTD device pl353-nand
[ 1.252517] Creating 3 MTD partitions on "pl353-nand":
[ 1.257610] 0x000000000000-0x000002000000 : "BOOT.bin-env-dts-kernel"
[ 1.265708] 0x000002000000-0x00000b000000 : "angstram-rootfs"
[ 1.273066] 0x00000b000000-0x000010000000 : "upgrade-rootfs"
[ 1.282090] TCP: cubic registered
[ 1.285331] NET: Registered protocol family 17
[ 1.290060] Registering SWP/SWPB emulation handler
[ 1.295944] regulator-dummy: disabling
[ 1.300318] UBI: attaching mtd1 to ubi0
[ 1.828083] UBI: scanning is finished
[ 1.839743] UBI: attached mtd1 (name "angstram-rootfs", size 144 MiB) to ubi0
[ 1.846795] UBI: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
[ 1.853583] UBI: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
[ 1.860267] UBI: VID header offset: 2048 (aligned 2048), data offset: 4096
[ 1.867105] UBI: good PEBs: 1152, bad PEBs: 0, corrupted PEBs: 0
[ 1.873115] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128
[ 1.880226] UBI: max/mean erase counter: 3/1, WL threshold: 4096, image sequence number: 862493722
[ 1.889153] UBI: available PEBs: 0, total reserved PEBs: 1152, PEBs reserved for bad PEB handling: 40
[ 1.898384] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
[ 1.898392] UBI: background thread "ubi_bgt0d" started, PID 1080
[ 1.914648] ALSA device list:
[ 1.917535] No soundcards found.
[ 1.922945] UBIFS: background thread "ubifs_bgt0_0" started, PID 1082
[ 1.983287] UBIFS: mounted UBI device 0, volume 0, name "rootfs"
[ 1.989213] UBIFS: LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes
[ 1.998360] UBIFS: FS size: 128626688 bytes (122 MiB, 1013 LEBs), journal size 9023488 bytes (8 MiB, 72 LEBs)
[ 2.008237] UBIFS: reserved for root: 0 bytes (0 KiB)
[ 2.013273] UBIFS: media format: w4/r0 (latest is w4/r0), UUID 2A24A8E1-2021-4A54-8A4E-D8E294AE00E5, small LPT model
[ 2.024838] VFS: Mounted root (ubifs filesystem) on device 0:11.
[ 2.031824] devtmpfs: mounted
[ 2.034937] Freeing unused kernel memory: 204K (c06d2000 - c0705000)
[ 2.880191] random: dd urandom read with 0 bits of entropy available
[ 3.279340]
[ 3.279340] bcm54xx_config_init
[ 3.889356]
[ 3.889356] bcm54xx_config_init
[ 7.890186] xemacps e000b000.ps7-ethernet: Set clk to 124999998 Hz
[ 7.896292] xemacps e000b000.ps7-ethernet: link up (1000/FULL)
[ 23.049192] In axi fpga driver!
[ 23.052260] request_mem_region OK!
[ 23.055651] AXI fpga dev virtual address is 0xdf9fc000
[ 23.060789] *base_vir_addr = 0xc510
[ 23.075999] In fpga mem driver!
[ 23.079175] request_mem_region OK!
[ 23.082679] fpga mem virtual address is 0xe2000000
[ 23.888571]
[ 23.888571] bcm54xx_config_init
[ 24.518464]
[ 24.518464] bcm54xx_config_init
[ 28.518791] xemacps e000b000.ps7-ethernet: Set clk to 124999998 Hz
[ 28.524896] xemacps e000b000.ps7-ethernet: link up (1000/FULL)
[ 1206.365243] random: nonblocking pool is initialized
This is XILINX board. Totalram: 507527168
Detect 512MB control board of XILINX
DETECT HW version=8000c510
miner ID : 805c6dc46880881c
Miner Type = T9+
AsicType = 1387
real AsicNum = 18
use critical mode to search freq...
get PLUG ON=0x07003f0e
Find hashboard on Chain[1]
Find hashboard on Chain[2]
Find hashboard on Chain[3]
Find hashboard on Chain[8]
Find hashboard on Chain[9]
Find hashboard on Chain[10]
Find hashboard on Chain[11]
Find hashboard on Chain[12]
Find hashboard on Chain[13]
set_reset_allhashboard = 0x0000ffff
chain[1] PIC jump to app
Check chain[1] PIC fw version=0x90
chain[2] PIC jump to app
Check chain[2] PIC fw version=0x90
chain[3] PIC jump to app
Check chain[3] PIC fw version=0x90
Chain[1] read_freq_badcores : 0x7d 0x33 0x33 0x33 0x11 0x33 0x33 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x11 0x11 0x11 0x10 0x16 0x10 0x21 0x12 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x15 0x10 0x32 0x20 0x20 0x10 0x00 0x00 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x11 0x11 0x11 0x11 0x10 0x11 0x00 0x11 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
chain[1]: [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255]
has freq in PIC, will disable freq setting.
chain[1] has freq in PIC and will jump over...
Chain[1] has core num in PIC
Chain[1] ASIC[0] has core num=1
Chain[1] ASIC[1] has core num=1
Chain[1] ASIC[2] has core num=1
Chain[1] ASIC[3] has core num=1
Chain[1] ASIC[4] has core num=1
Chain[1] ASIC[5] has core num=1
Chain[1] ASIC[6] has core num=1
Chain[1] ASIC[7] has core num=1
Chain[1] ASIC[8] has core num=1
Chain[1] ASIC[10] has core num=1
Chain[1] ASIC[11] has core num=6
Chain[1] ASIC[12] has core num=1
Chain[1] ASIC[14] has core num=2
Chain[1] ASIC[15] has core num=1
Chain[1] ASIC[16] has core num=1
Chain[1] ASIC[17] has core num=2
Chain[2] read_freq_badcores : 0x7d 0x33 0x33 0x33 0x11 0x33 0x33 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x00 0x10 0x10 0x01 0x02 0x11 0x11 0x12 0x11 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x01 0x01 0x02 0x11 0x10 0x11 0x10 0x11 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x20 0x11 0x12 0x01 0x01 0x01 0x01 0x11 0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
chain[2]: [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255]
has freq in PIC, will disable freq setting.
chain[2] has freq in PIC and will jump over...
Chain[2] has core num in PIC
Chain[2] ASIC[2] has core num=1
Chain[2] ASIC[4] has core num=1
Chain[2] ASIC[7] has core num=1
Chain[2] ASIC[9] has core num=2
Chain[2] ASIC[10] has core num=1
Chain[2] ASIC[11] has core num=1
Chain[2] ASIC[12] has core num=1
Chain[2] ASIC[13] has core num=1
Chain[2] ASIC[14] has core num=1
Chain[2] ASIC[15] has core num=2
Chain[2] ASIC[16] has core num=1
Chain[2] ASIC[17] has core num=1
Chain[3] read_freq_badcores : 0x7d 0x33 0x33 0x33 0x11 0x33 0x33 0x3f 0x57 0x00 0xff 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x01 0x13 0x22 0x21 0x23 0x10 0x02 0x10 0x11 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x15 0x11 0x11 0x00 0x00 0x01 0x11 0x11 0x21 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x20 0x10 0x00 0x03 0x01 0x31 0x01 0x00 0x18 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
chain[3]: [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255]
has freq in PIC, will disable freq setting.
chain[3] has freq in PIC and will jump over...
Chain[3] has core num in PIC
Chain[3] ASIC[1] has core num=1
Chain[3] ASIC[2] has core num=1
Chain[3] ASIC[3] has core num=3
Chain[3] ASIC[4] has core num=2
Chain[3] ASIC[5] has core num=2
Chain[3] ASIC[6] has core num=2
Chain[3] ASIC[7] has core num=1
Chain[3] ASIC[8] has core num=2
Chain[3] ASIC[9] has core num=3
Chain[3] ASIC[10] has core num=1
Chain[3] ASIC[13] has core num=2
Chain[3] ASIC[14] has core num=1
Chain[3] ASIC[16] has core num=1
Chain[3] ASIC[17] has core num=1
has freq in PIC, will disable freq setting.
chain[8] has freq in PIC and will jump over...
Chain[8] has core num in PIC
Chain[8] ASIC[0] has core num=1
Chain[8] ASIC[1] has core num=1
Chain[8] ASIC[2] has core num=1
Chain[8] ASIC[3] has core num=5
Chain[8] ASIC[4] has core num=1
Chain[8] ASIC[6] has core num=3
Chain[8] ASIC[7] has core num=2
Chain[8] ASIC[8] has core num=2
Chain[8] ASIC[10] has core num=2
Chain[8] ASIC[12] has core num=1
has freq in PIC, will disable freq setting.
chain[9] has freq in PIC and will jump over...
Chain[9] has core num in PIC
Chain[9] ASIC[0] has core num=1
Chain[9] ASIC[1] has core num=1
Chain[9] ASIC[2] has core num=1
Chain[9] ASIC[3] has core num=1
Chain[9] ASIC[4] has core num=1
Chain[9] ASIC[5] has core num=1
Chain[9] ASIC[6] has core num=1
Chain[9] ASIC[7] has core num=1
Chain[9] ASIC[8] has core num=1
Chain[9] ASIC[9] has core num=1
Chain[9] ASIC[10] has core num=1
Chain[9] ASIC[12] has core num=1
Chain[9] ASIC[13] has core num=1
Chain[9] ASIC[16] has core num=1
Chain[9] ASIC[17] has core num=1
has freq in PIC, will disable freq setting.
chain[10] has freq in PIC and will jump over...
Chain[10] has core num in PIC
Chain[10] ASIC[0] has core num=1
Chain[10] ASIC[1] has core num=1
Chain[10] ASIC[3] has core num=1
Chain[10] ASIC[5] has core num=1
Chain[10] ASIC[7] has core num=2
Chain[10] ASIC[8] has core num=1
Chain[10] ASIC[9] has core num=1
Chain[10] ASIC[10] has core num=1
Chain[10] ASIC[12] has core num=1
Chain[10] ASIC[13] has core num=1
Chain[10] ASIC[14] has core num=1
Chain[10] ASIC[16] has core num=1
Chain[10] ASIC[17] has core num=1
has freq in PIC, will disable freq setting.
chain[11] has freq in PIC and will jump over...
Chain[11] has core num in PIC
Chain[11] ASIC[0] has core num=2
Chain[11] ASIC[2] has core num=1
Chain[11] ASIC[3] has core num=1
Chain[11] ASIC[4] has core num=1
Chain[11] ASIC[5] has core num=2
Chain[11] ASIC[7] has core num=1
Chain[11] ASIC[9] has core num=1
Chain[11] ASIC[11] has core num=1
Chain[11] ASIC[13] has core num=1
Chain[11] ASIC[14] has core num=1
Chain[11] ASIC[15] has core num=1
Chain[11] ASIC[17] has core num=1
has freq in PIC, will disable freq setting.
chain[12] has freq in PIC and will jump over...
Chain[12] has core num in PIC
Chain[12] ASIC[0] has core num=1
Chain[12] ASIC[1] has core num=5
Chain[12] ASIC[2] has core num=1
Chain[12] ASIC[3] has core num=1
Chain[12] ASIC[4] has core num=1
Chain[12] ASIC[5] has core num=1
Chain[12] ASIC[11] has core num=1
Chain[12] ASIC[12] has core num=1
Chain[12] ASIC[13] has core num=1
Chain[12] ASIC[14] has core num=1
Chain[12] ASIC[15] has core num=1
Chain[12] ASIC[16] has core num=2
Chain[12] ASIC[17] has core num=1
has freq in PIC, will disable freq setting.
chain[13] has freq in PIC and will jump over...
Chain[13] has core num in PIC
Chain[13] ASIC[0] has core num=2
Chain[13] ASIC[2] has core num=1
Chain[13] ASIC[7] has core num=3
Chain[13] ASIC[9] has core num=1
Chain[13] ASIC[10] has core num=3
Chain[13] ASIC[11] has core num=1
Chain[13] ASIC[13] has core num=1
Chain[13] ASIC[16] has core num=1
Chain[13] ASIC[17] has core num=8
get PIC voltage=11 on chain[1], value=870
get PIC voltage=11 on chain[2], value=870
get PIC voltage=11 on chain[3], value=870
get PIC voltage=11 on chain[8], value=870
get PIC voltage=11 on chain[9], value=870
get PIC voltage=11 on chain[10], value=870
get PIC voltage=11 on chain[11], value=870
get PIC voltage=11 on chain[12], value=870
get PIC voltage=11 on chain[13], value=870
set_reset_allhashboard = 0x00000000
chain[8] temp offset record: 1,1,0,0,0,0,33,28
chain[8] temp chip I2C addr=0x98
chain[10] temp offset record: 1,2,0,0,0,0,33,28
chain[10] temp chip I2C addr=0x98
chain[12] temp offset record: 1,-1,0,0,0,0,33,28
chain[12] temp chip I2C addr=0x98
set_reset_allhashboard = 0x0000ffff
set_reset_allhashboard = 0x00000000
CRC error counter=0
set command mode to VIL
--- check asic number
After Get ASIC NUM CRC error counter=0
set_baud=0
The min freq=700
set real timeout 52, need sleep=379392
After TEST CRC error counter=0
search freq for 1 times, completed chain = 9, total chain num = 9
set_reset_allhashboard = 0x0000ffff
set_reset_allhashboard = 0x00000000
restart Miner chance num=2
waiting for receive_func to exit!
waiting for pic heart to exit!
bmminer not found= 1401 root 0:00 grep bmminer
bmminer not found, restart bmminer ...
This is user mode for mining
Detect 512MB control board of XILINX
Miner Type = T9+
Miner compile time: Fri Nov 24 23:19:16 EST 2017 type: Antminer T9+set_reset_allhashboard = 0x0000ffff
set_reset_allhashboard = 0x00000000
set_reset_allhashboard = 0x0000ffff
miner ID : 805c6dc46880881c
set_reset_allhashboard = 0x0000ffff
Checking fans!get fan[5] speed=5760
get fan[2] speed=5880
get fan[5] speed=5760
get fan[2] speed=5880
get fan[5] speed=5760
chain[1] PIC jump to app
Check chain[1] PIC fw version=0x90
Chain[1] read_freq_badcores : 0x7d 0x33 0x33 0x33 0x11 0x33 0x33 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x11 0x11 0x11 0x10 0x16 0x10 0x21 0x12 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x15 0x10 0x32 0x20 0x20 0x10 0x00 0x00 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x11 0x11 0x11 0x11 0x10 0x11 0x00 0x11 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
chain[1]: [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255]
Chain[J2] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J2] test patten OK temp=-1
chain[2] PIC jump to app
Check chain[2] PIC fw version=0x90
Chain[2] read_freq_badcores : 0x7d 0x33 0x33 0x33 0x11 0x33 0x33 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x00 0x10 0x10 0x01 0x02 0x11 0x11 0x12 0x11 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x11 0x01 0x01 0x02 0x11 0x10 0x11 0x10 0x11 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x20 0x11 0x12 0x01 0x01 0x01 0x01 0x11 0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
chain[2]: [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255]
Chain[J3] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J3] test patten OK temp=-1
chain[3] PIC jump to app
Check chain[3] PIC fw version=0x90
Chain[3] read_freq_badcores : 0x7d 0x33 0x33 0x33 0x11 0x33 0x33 0x3f 0x57 0x00 0xff 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x01 0x13 0x22 0x21 0x23 0x10 0x02 0x10 0x11 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x15 0x11 0x11 0x00 0x00 0x01 0x11 0x11 0x21 0x3e 0x57 0x00 0xff 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x3e 0x20 0x10 0x00 0x03 0x01 0x31 0x01 0x00 0x18 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
chain[3]: [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255] [255:255]
Chain[J4] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J4] test patten OK temp=-1
Chain[J9] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J9] test patten OK temp=-1
Chain[J10] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J10] test patten OK temp=-1
Chain[J11] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J11] test patten OK temp=-1
Chain[J12] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J12] test patten OK temp=-1
Chain[J13] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J13] test patten OK temp=-1
Chain[J14] has backup chain_voltage=870
Detect: use voltage limit rules on single board!
Detect: T9+ use voltage level=1
Chain[J14] test patten OK temp=-1
Chain[J2] will use voltage=930 [1] to open core
Chain[J3] will use voltage=930 [1] to open core
Chain[J4] will use voltage=930 [1] to open core
Chain[J9] will use voltage=930 [1] to open core
Chain[J10] will use voltage=930 [1] to open core
Chain[J11] will use voltage=930 [1] to open core
Chain[J12] will use voltage=930 [1] to open core
Chain[J13] will use voltage=930 [1] to open core
Chain[J14] will use voltage=930 [1] to open core
Chain[J2] orignal chain_voltage_pic=11 value=870
Chain[J3] orignal chain_voltage_pic=11 value=870
Chain[J4] orignal chain_voltage_pic=11 value=870
Chain[J9] orignal chain_voltage_pic=1 value=930
Chain[J9] will use backup chain_voltage_pic=870 [11]
Chain[J9] get working chain_voltage_pic=11
Chain[J10] orignal chain_voltage_pic=1 value=930
Chain[J10] will use backup chain_voltage_pic=870 [11]
Chain[J10] get working chain_voltage_pic=11
Chain[J11] orignal chain_voltage_pic=1 value=930
Chain[J11] will use backup chain_voltage_pic=870 [11]
Chain[J11] get working chain_voltage_pic=11
Chain[J12] orignal chain_voltage_pic=1 value=930
Chain[J12] will use backup chain_voltage_pic=870 [11]
Chain[J12] get working chain_voltage_pic=11
Chain[J13] orignal chain_voltage_pic=1 value=930
Chain[J13] will use backup chain_voltage_pic=870 [11]
Chain[J13] get working chain_voltage_pic=11
Chain[J14] orignal chain_voltage_pic=1 value=930
Chain[J14] will use backup chain_voltage_pic=870 [11]
Chain[J14] get working chain_voltage_pic=11
set_reset_allhashboard = 0x0000ffff
set_reset_allhashboard = 0x00000000
T9+ try get asic num for the 1 time
Chain[J2] has 18 asic
Chain[J3] has 18 asic
Chain[J4] has 18 asic
Chain[J9] has 18 asic
Chain[J10] has 18 asic
Chain[J11] has 18 asic
Chain[J12] has 18 asic
Chain[J13] has 18 asic
Chain[J14] has 18 asic
Chain[J2] has core num in PIC
Chain[J2] ASIC[0] has core num=1
Chain[J2] ASIC[1] has core num=1
Chain[J2] ASIC[2] has core num=1
Chain[J2] ASIC[3] has core num=1
Chain[J2] ASIC[4] has core num=1
Chain[J2] ASIC[5] has core num=1
Chain[J2] ASIC[6] has core num=1
Chain[J2] ASIC[7] has core num=1
Chain[J2] ASIC[8] has core num=1
Chain[J2] ASIC[10] has core num=1
Chain[J2] ASIC[11] has core num=6
Chain[J2] ASIC[12] has core num=1
Chain[J2] ASIC[14] has core num=2
Chain[J2] ASIC[15] has core num=1
Chain[J2] ASIC[16] has core num=1
Chain[J2] ASIC[17] has core num=2
Chain[J3] has core num in PIC
Chain[J3] ASIC[2] has core num=1
Chain[J3] ASIC[4] has core num=1
Chain[J3] ASIC[7] has core num=1
Chain[J3] ASIC[9] has core num=2
Chain[J3] ASIC[10] has core num=1
Chain[J3] ASIC[11] has core num=1
Chain[J3] ASIC[12] has core num=1
Chain[J3] ASIC[13] has core num=1
Chain[J3] ASIC[14] has core num=1
Chain[J3] ASIC[15] has core num=2
Chain[J3] ASIC[16] has core num=1
Chain[J3] ASIC[17] has core num=1
Chain[J4] has core num in PIC
Chain[J4] ASIC[1] has core num=1
Chain[J4] ASIC[2] has core num=1
Chain[J4] ASIC[3] has core num=3
Chain[J4] ASIC[4] has core num=2
Chain[J4] ASIC[5] has core num=2
Chain[J4] ASIC[6] has core num=2
Chain[J4] ASIC[7] has core num=1
Chain[J4] ASIC[8] has core num=2
Chain[J4] ASIC[9] has core num=3
Chain[J4] ASIC[10] has core num=1
Chain[J4] ASIC[13] has core num=2
Chain[J4] ASIC[14] has core num=1
Chain[J4] ASIC[16] has core num=1
Chain[J4] ASIC[17] has core num=1
Chain[J9] has core num in PIC
Chain[J9] ASIC[0] has core num=1
Chain[J9] ASIC[1] has core num=1
Chain[J9] ASIC[2] has core num=1
Chain[J9] ASIC[3] has core num=5
Chain[J9] ASIC[4] has core num=1
Chain[J9] ASIC[6] has core num=3
Chain[J9] ASIC[7] has core num=2
Chain[J9] ASIC[8] has core num=2
Chain[J9] ASIC[10] has core num=2
Chain[J9] ASIC[12] has core num=1
Chain[J10] has core num in PIC
Chain[J10] ASIC[0] has core num=1
Chain[J10] ASIC[1] has core num=1
Chain[J10] ASIC[2] has core num=1
Chain[J10] ASIC[3] has core num=1
Chain[J10] ASIC[4] has core num=1
Chain[J10] ASIC[5] has core num=1
Chain[J10] ASIC[6] has core num=1
Chain[J10] ASIC[7] has core num=1
Chain[J10] ASIC[8] has core num=1
Chain[J10] ASIC[9] has core num=1
Chain[J10] ASIC[10] has core num=1
Chain[J10] ASIC[12] has core num=1
Chain[J10] ASIC[13] has core num=1
Chain[J10] ASIC[16] has core num=1
Chain[J10] ASIC[17] has core num=1
Chain[J11] has core num in PIC
Chain[J11] ASIC[0] has core num=1
Chain[J11] ASIC[1] has core num=1
Chain[J11] ASIC[3] has core num=1
Chain[J11] ASIC[5] has core num=1
Chain[J11] ASIC[7] has core num=2
Chain[J11] ASIC[8] has core num=1
Chain[J11] ASIC[9] has core num=1
Chain[J11] ASIC[10] has core num=1
Chain[J11] ASIC[12] has core num=1
Chain[J11] ASIC[13] has core num=1
Chain[J11] ASIC[14] has core num=1
Chain[J11] ASIC[16] has core num=1
Chain[J11] ASIC[17] has core num=1
Chain[J12] has core num in PIC
Chain[J12] ASIC[0] has core num=2
Chain[J12] ASIC[2] has core num=1
Chain[J12] ASIC[3] has core num=1
Chain[J12] ASIC[4] has core num=1
Chain[J12] ASIC[5] has core num=2
Chain[J12] ASIC[7] has core num=1
Chain[J12] ASIC[9] has core num=1
Chain[J12] ASIC[11] has core num=1
Chain[J12] ASIC[13] has core num=1
Chain[J12] ASIC[14] has core num=1
Chain[J12] ASIC[15] has core num=1
Chain[J12] ASIC[17] has core num=1
Chain[J13] has core num in PIC
Chain[J13] ASIC[0] has core num=1
Chain[J13] ASIC[1] has core num=5
Chain[J13] ASIC[2] has core num=1
Chain[J13] ASIC[3] has core num=1
Chain[J13] ASIC[4] has core num=1
Chain[J13] ASIC[5] has core num=1
Chain[J13] ASIC[11] has core num=1
Chain[J13] ASIC[12] has core num=1
Chain[J13] ASIC[13] has core num=1
Chain[J13] ASIC[14] has core num=1
Chain[J13] ASIC[15] has core num=1
Chain[J13] ASIC[16] has core num=2
Chain[J13] ASIC[17] has core num=1
Chain[J14] has core num in PIC
Chain[J14] ASIC[0] has core num=2
Chain[J14] ASIC[2] has core num=1
Chain[J14] ASIC[7] has core num=3
Chain[J14] ASIC[9] has core num=1
Chain[J14] ASIC[10] has core num=3
Chain[J14] ASIC[11] has core num=1
Chain[J14] ASIC[13] has core num=1
Chain[J14] ASIC[16] has core num=1
Chain[J14] ASIC[17] has core num=8
miner total rate=10538GH/s fixed rate=10500GH/s
read PIC voltage=930 on chain[1]
Chain:1 chipnum=18
Chain[J2] voltage added=0.0V
Chain:1 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:1 max freq=575
Chain:1 min freq=575
read PIC voltage=930 on chain[2]
Chain:2 chipnum=18
Chain[J3] voltage added=0.0V
Chain:2 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:2 max freq=575
Chain:2 min freq=575
read PIC voltage=930 on chain[3]
Chain:3 chipnum=18
Chain[J4] voltage added=0.0V
Chain:3 base freq=581
Asic[ 0]:581
Asic[ 1]:581 Asic[ 2]:581 Asic[ 3]:581 Asic[ 4]:581 Asic[ 5]:581 Asic[ 6]:581 Asic[ 7]:581 Asic[ 8]:581
Asic[ 9]:581 Asic[10]:581 Asic[11]:581 Asic[12]:581 Asic[13]:581 Asic[14]:581 Asic[15]:581 Asic[16]:581
Asic[17]:581
Chain:3 max freq=581
Chain:3 min freq=581
read PIC voltage=930 on chain[8]
Chain:8 chipnum=18
Chain[J9] voltage added=0.0V
Chain:8 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:8 max freq=575
Chain:8 min freq=575
read PIC voltage=930 on chain[9]
Chain:9 chipnum=18
Chain[J10] voltage added=0.0V
Chain:9 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:9 max freq=575
Chain:9 min freq=575
read PIC voltage=930 on chain[10]
Chain:10 chipnum=18
Chain[J11] voltage added=0.0V
Chain:10 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:10 max freq=575
Chain:10 min freq=575
read PIC voltage=930 on chain[11]
Chain:11 chipnum=18
Chain[J12] voltage added=0.0V
Chain:11 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:11 max freq=575
Chain:11 min freq=575
read PIC voltage=930 on chain[12]
Chain:12 chipnum=18
Chain[J13] voltage added=0.0V
Chain:12 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:12 max freq=575
Chain:12 min freq=575
read PIC voltage=930 on chain[13]
Chain:13 chipnum=18
Chain[J14] voltage added=0.0V
Chain:13 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:13 max freq=575
Chain:13 min freq=575
Miner fix freq ...
read PIC voltage=930 on chain[1]
Chain:1 chipnum=18
Chain[J2] voltage added=0.0V
Chain:1 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:1 max freq=575
Chain:1 min freq=575
read PIC voltage=930 on chain[2]
Chain:2 chipnum=18
Chain[J3] voltage added=0.0V
Chain:2 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:2 max freq=575
Chain:2 min freq=575
read PIC voltage=930 on chain[3]
Chain:3 chipnum=18
Chain[J4] voltage added=0.0V
Chain:3 base freq=581
Asic[ 0]:581
Asic[ 1]:581 Asic[ 2]:581 Asic[ 3]:581 Asic[ 4]:581 Asic[ 5]:581 Asic[ 6]:581 Asic[ 7]:581 Asic[ 8]:581
Asic[ 9]:581 Asic[10]:581 Asic[11]:581 Asic[12]:581 Asic[13]:581 Asic[14]:581 Asic[15]:581 Asic[16]:581
Asic[17]:581
Chain:3 max freq=581
Chain:3 min freq=581
read PIC voltage=930 on chain[8]
Chain:8 chipnum=18
Chain[J9] voltage added=0.0V
Chain:8 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:8 max freq=575
Chain:8 min freq=575
read PIC voltage=930 on chain[9]
Chain:9 chipnum=18
Chain[J10] voltage added=0.0V
Chain:9 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:9 max freq=575
Chain:9 min freq=575
read PIC voltage=930 on chain[10]
Chain:10 chipnum=18
Chain[J11] voltage added=0.0V
Chain:10 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:10 max freq=575
Chain:10 min freq=575
read PIC voltage=930 on chain[11]
Chain:11 chipnum=18
Chain[J12] voltage added=0.0V
Chain:11 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:11 max freq=575
Chain:11 min freq=575
read PIC voltage=930 on chain[12]
Chain:12 chipnum=18
Chain[J13] voltage added=0.0V
Chain:12 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:12 max freq=575
Chain:12 min freq=575
read PIC voltage=930 on chain[13]
Chain:13 chipnum=18
Chain[J14] voltage added=0.0V
Chain:13 base freq=575
Asic[ 0]:575
Asic[ 1]:575 Asic[ 2]:575 Asic[ 3]:575 Asic[ 4]:575 Asic[ 5]:575 Asic[ 6]:575 Asic[ 7]:575 Asic[ 8]:575
Asic[ 9]:575 Asic[10]:575 Asic[11]:575 Asic[12]:575 Asic[13]:575 Asic[14]:575 Asic[15]:575 Asic[16]:575
Asic[17]:575
Chain:13 max freq=575
Chain:13 min freq=575
max freq = 581
set baud=1
Chain[J9] PIC temp offset=1,1,0,0,0,0,33,28
chain[8] temp chip I2C addr=0x98
Chain[J9] chip[0] use PIC middle temp offset=1 typeID=41
New offset Chain[8] chip[0] local:25 remote:23 offset:32
Chain[J9] chip[0] get middle temp offset=32 typeID=41
Chain[J11] PIC temp offset=1,2,0,0,0,0,33,28
chain[10] temp chip I2C addr=0x98
Chain[J11] chip[0] use PIC middle temp offset=2 typeID=41
New offset Chain[10] chip[0] local:25 remote:23 offset:32
Chain[J11] chip[0] get middle temp offset=32 typeID=41
Chain[J13] PIC temp offset=1,-1,0,0,0,0,33,28
chain[12] temp chip I2C addr=0x98
Chain[J13] chip[0] use PIC middle temp offset=-1 typeID=41
New offset Chain[12] chip[0] local:25 remote:25 offset:30
Chain[J13] chip[0] get middle temp offset=30 typeID=41
single board rate=1166 voltage limit=870 on chain[1]
get PIC voltage=870 on chain[1], check: must be < 870
single board rate=1171 voltage limit=870 on chain[2]
get PIC voltage=870 on chain[2], check: must be < 870
single board rate=1178 voltage limit=870 on chain[3]
get PIC voltage=870 on chain[3], check: must be < 870
single board rate=1168 voltage limit=870 on chain[8]
get PIC voltage=870 on chain[8], check: must be < 870
single board rate=1171 voltage limit=870 on chain[9]
get PIC voltage=870 on chain[9], check: must be < 870
single board rate=1171 voltage limit=870 on chain[10]
get PIC voltage=870 on chain[10], check: must be < 870
single board rate=1171 voltage limit=870 on chain[11]
get PIC voltage=870 on chain[11], check: must be < 870
single board rate=1169 voltage limit=870 on chain[12]
get PIC voltage=870 on chain[12], check: must be < 870
single board rate=1167 voltage limit=870 on chain[13]
get PIC voltage=870 on chain[13], check: must be < 870
open core on chain[1] [8] [9]...
set voltage=870 on chain[1], the real voltage=870
Chain[J2] set working voltage=870 [11]
open core on chain[2] [10] [11]...
set voltage=870 on chain[2], the real voltage=870
Chain[J3] set working voltage=870 [11]
open core on chain[3] [12] [13]...
set voltage=870 on chain[3], the real voltage=870
Chain[J4] set working voltage=870 [11]
setStartTimePoint total_tv_start_sys=144 total_tv_end_sys=145
restartNum = 2 , auto-reinit enabled...
do read_temp_func once...
do check_asic_reg 0x08
get RT hashrate from Chain[1]: (asic index start from 1-18)
Asic[01]=59.9780 Asic[02]=68.5510 Asic[03]=62.1760 Asic[04]=63.7860 Asic[05]=65.9170 Asic[06]=61.9410 Asic[07]=65.4140 Asic[08]=61.4710
Asic[09]=56.6390 Asic[10]=65.1620 Asic[11]=61.8740 Asic[12]=62.7630 Asic[13]=62.7800 Asic[14]=61.5550 Asic[15]=65.8500 Asic[16]=68.3500
Asic[17]=62.0750 Asic[18]=61.3870
get RT hashrate from Chain[2]: (asic index start from 1-18)
[color=red][b]Asic[01]=0.00000 Asic[02]=0.00000 [/b][/color]Asic[03]=66.2530 Asic[04]=68.8200 Asic[05]=66.9410 Asic[06]=65.1290 Asic[07]=63.2660 Asic[08]=65.7160
Asic[09]=64.0380 Asic[10]=60.4310 Asic[11]=59.9280 Asic[12]=68.4840 Asic[13]=65.0450 Asic[14]=68.8030 Asic[15]=63.8540 Asic[16]=67.0920
Asic[17]=61.0350 Asic[18]=64.4740
get RT hashrate from Chain[3]: (asic index start from 1-18)
Asic[01]=66.1690 Asic[02]=66.7560 Asic[03]=67.2090 Asic[04]=67.6790 Asic[05]=67.7460 Asic[06]=63.2160 Asic[07]=64.4740 Asic[08]=63.0320
Asic[09]=67.6960 Asic[10]=64.8430 Asic[11]=62.9480 Asic[12]=63.1660 Asic[13]=67.6450 Asic[14]=62.9310 Asic[15]=66.7220 Asic[16]=68.8360
Asic[17]=65.9680 Asic[18]=65.6990
get RT hashrate from Chain[8]: (asic index start from 1-18)
Asic[01]=68.3160 Asic[02]=66.3870 Asic[03]=66.7060 Asic[04]=68.6020 Asic[05]=68.2660 Asic[06]=66.7730 Asic[07]=63.0820 Asic[08]=66.9070
Asic[09]=63.3330 Asic[10]=65.0620 Asic[11]=61.0010 Asic[12]=64.1390 Asic[13]=66.2190 Asic[14]=65.7330 Asic[15]=68.1820 Asic[16]=66.3030
Asic[17]=67.4770 Asic[18]=61.7560
get RT hashrate from Chain[9]: (asic index start from 1-18)
Asic[01]=65.8840 Asic[02]=69.0210 Asic[03]=65.4140 Asic[04]=65.8000 Asic[05]=67.1080 Asic[06]=64.7260 Asic[07]=65.5820 Asic[08]=62.4610
Asic[09]=65.3800 Asic[10]=69.2890 Asic[11]=68.3000 Asic[12]=60.4140 Asic[13]=64.2730 Asic[14]=61.3200 Asic[15]=62.8300 Asic[16]=63.7700
Asic[17]=68.5180 Asic[18]=67.4610
get RT hashrate from Chain[10]: (asic index start from 1-18)
Asic[01]=63.0320 Asic[02]=57.9480 Asic[03]=62.3940 Asic[04]=62.4950 Asic[05]=65.9840 Asic[06]=69.6750 Asic[07]=66.3030 Asic[08]=64.4740
Asic[09]=68.9710 Asic[10]=61.8400 Asic[11]=65.0950 Asic[12]=69.3900 Asic[13]=67.4770 Asic[14]=62.2930 Asic[15]=62.5450 Asic[16]=63.9710
Asic[17]=62.6960 Asic[18]=70.7490
[color=red]get RT hashrate from Chain[11]: (asic index start from 1-18)
Asic[01]=66.9570 Asic[02]=32.5640 [/b][/color]
get RT hashrate from Chain[12]: (asic index start from 1-18)
Asic[01]=62.7300 Asic[02]=61.9580 Asic[03]=66.1690 Asic[04]=64.8100 Asic[05]=64.9610 Asic[06]=62.7800 Asic[07]=67.4770 Asic[08]=68.5850
Asic[09]=62.0080 Asic[10]=68.5510 Asic[11]=67.1920 Asic[12]=63.6020 Asic[13]=67.7960 Asic[14]=58.7530 Asic[15]=64.6250 Asic[16]=68.9870
Asic[17]=63.6690 Asic[18]=66.8570
get RT hashrate from Chain[13]: (asic index start from 1-18)
Asic[01]=67.5110 Asic[02]=60.3300 Asic[03]=61.6730 Asic[04]=63.5350 Asic[05]=68.7690 Asic[06]=68.9870 Asic[07]=63.7700 Asic[08]=60.2970
Asic[09]=66.1690 Asic[10]=64.2390 Asic[11]=68.5680 Asic[12]=64.0720 Asic[13]=63.0320 Asic[14]=65.0780 Asic[15]=68.7190 Asic[16]=66.8060
Asic[17]=63.0990 Asic[18]=60.4650
Check Chain[J2] ASIC RT error: (asic index start from 1-18)
Check Chain[J3] ASIC RT error: (asic index start from 1-18)
Check Chain[J4] ASIC RT error: (asic index start from 1-18)
Check Chain[J9] ASIC RT error: (asic index start from 1-18)
Check Chain[J10] ASIC RT error: (asic index start from 1-18)
Check Chain[J11] ASIC RT error: (asic index start from 1-18)
Check Chain[J12] ASIC RT error: (asic index start from 1-18)
Check Chain[J13] ASIC RT error: (asic index start from 1-18)
Check Chain[J14] ASIC RT error: (asic index start from 1-18)
Done check_asic_reg
do read temp on Chain[8]
Chain[8] Chip[1] TempTypeID=41 middle offset=32
Chain[8] Chip[1] local Temp=61
Chain[8] Chip[1] middle Temp=72
Special fix Chain[8] Chip[1] middle Temp = 76
Done read temp on Chain[8]
do read temp on Chain[10]
Chain[10] Chip[1] TempTypeID=41 middle offset=32
Chain[10] Chip[1] local Temp=55
Chain[10] Chip[1] middle Temp=60
Special fix Chain[10] Chip[1] middle Temp = 70
Done read temp on Chain[10]
do read temp on Chain[12]
Chain[12] Chip[1] TempTypeID=41 middle offset=30
Chain[12] Chip[1] local Temp=60
Chain[12] Chip[1] middle Temp=72
Special fix Chain[12] Chip[1] middle Temp = 75
Done read temp on Chain[12]
set FAN speed according to: temp_highest=61 temp_top1[PWM_T]=61 temp_top1[TEMP_POS_LOCAL]=61 temp_change=1 fix_fan_steps=0
FAN PWM: 70
read_temp_func Done!
CRC error counter=2121
Moderator's note: This post was edited by frodocooper to add code tags.