Can you make an educated speculation as to what would be the underlying business strategy?
What is the technical merit of multiplying the complexity of the engine several times in exchange for the gains lower than the regular manufacturing tolerances?
Lots of ASICs get designed purely for non-technical reasons: copy protection, hiding of patent or license violation in a way that is extremely hard to reverse-engineer and litigate, etc.
I think there should be some constructive speculation that you could post without violating your NDAs, don't you think? Or maybe everyone at your company already knows that HyperMega is a pseudonym of their 1st VP of Sales, and everyone there already watches your back?
I think the answer is more simple. The originators of the project, if not engineers, may have seen any "easy" answer with ASICboost. If the BPDL was always planned by Halong then that also answers the question as it requires everyone using ASICboost to release all patents and purchase rights for any IP that is licensed from third-parties for everyone in the BPDL.
https://blockchaindpl.org/licensev10As far as optimizations of layout go, am looking at some different methodologies.
This one is interesting. Not sure if their exact approach applies, but this 2017 paper shows power and efficiency improvements on the order of 300% for a modelled cryptographic implementation using asynchronous clocks.
https://www.sciencedirect.com/science/article/pii/S2090123217301170