Post
Topic
Board Hardware
Re: ANN: custom BFL firmware - tested 5-7GH pool meas. improvement on 60GH singles
by
jyyst
on 20/10/2013, 19:21:45 UTC
I uncommented DO_NOT_USE_ENGINE_ZERO and it's not helped.

Try upping the boot frequency, specified at the top of ASIC_engine.c ... the variables you see commented, try setting the boot index one higher.
I tried and it's not help
All changes that i made:
Code:
/*************** Product Model *********************/
#define __PRODUCT_MODEL_JALAPENO__
//#define    __PRODUCT_MODEL_LITTLE_SINGLE__
//#define __PRODUCT_MODEL_SINGLE__
//#define __PRODUCT_MODEL_MINIRIG__

Code:
/////////////////////////////////////////////////////////////////////////
// This means DO NOT USE ENGINE 0. It's needed for the actual Version
#define DO_NOT_USE_ENGINE_ZERO

Code:
// USER CHANGEABLE VARIABLES###################################################
//specify freq index of booting up chips
const unsigned int __ASIC_BOOT_FREQ = 6;
//specify freq index of diag tests on chips
const unsigned int __ASIC_TEST_FREQ = 6;
//specify % errors detected at which engines are considered failed for __TOTAL_DIAGNOSTICS_RUN ... (0 = allow no failure, 100 = allow all)
const unsigned int failPercentThreshold = 0;
//specify running freq index of each chip manually
const unsigned int __ASIC_FREQUENCY_PERCPU_MAP[16] = { 9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9 };
//backup def const unsigned int __ASIC_FREQUENCY_PERCPU_MAP[16] = { 9,9,7,8,8,9,9,7,9,8,7,8,9,7,9,9 };
//END##########################################################################