Re: Baikal Giant N - Cryptonight, Cryptonight-lite FPGA/ASIC miner
Monero community could be vibrant, but good question is why the monero devs didnt increased the scratchpad size from the current size (2Mb), fpga miners are not affected by this fork 
I talked to another cryptonight coin developer about fpga, he said that it's cost prohibitive due to memory restrictions. So there goes fpga out the door, cause I was thinking fpga too.
I'm developing many algorithms for the Virtex Ultrascale+ VU9P on the VCU1525 board and this FPGA has 47MB of internal SRAM, enough for 22 instances of Cryptonight V7. Your developer friend is gravely mistaken.
Having said that, Cryptonight V7 is not the most profitable algorithm for FPGA's at the moment, but high end FPGA's always beat GPU's, and ROI for the high end FPGA's are around 50-110 days vs. years for GPU's.
I will be releasing my bitstreams (to the public) soon, my current plan is to release them for free with a 4% mining fee. And you would need to buy your own FPGA boards from Avnet/Digikey/Xilinx/Digilent/Hitechglobal/Bittware, etc...
Have you built fully unrolled pipelines on this board? What temperature and what consumption do you expect for 99% of the resources clocked at 500-600 MHz?
Are you sure there are enough boards produced by Xilinx?
I thought about the hardware implementation of devfees, based on DeviceDNA and block timestamp. The user will not be able to turn it off.
I can build at least 8 memory-less algoritms suitable for this board, but only 5 of them are profitable. So this is a good investment.