However, some algorithms like Timetravel8, Timetravel10, X11Evo, X16R, X16S, they change the algorithm every block. An FPGA can rapidly reconfigure itself to optimize itself each block; an ASIC cannot. Therefore these algorithms are truly ASIC-proof, in that no ASIC can beat an FPGA (ever) on those coins, unless the ASIC itself is just designed as an FPGA which would be a waste of money since you can just buy ready-made FPGA's.
Correct me if im wrong but i think that algos like X16R still can be attacked with ASICs, you dont have to implement all of the algos that this algo is cycling through you just have to pick the once that are for example 3-4 times even more faster on ASIC compared to a GPU with a much less electricity consumed then you mine when blocks with the implemented algos are coming.
You should re-read the X16R white paper. X16R uses 16 algorithms on every single block, done in sequence, in a different order. You need to understand how pipelining works. An ASIC capable of all 16 algorithms would not be able to pipeline the algorithms because the pipeline requires the order to be the same. Titanic multiplexers might solve the problem for Timetravel8 and Timetravel10, but X16R has the extra change that some times you do one algorithms 3 times in the same set, making an FPGA the only method that could run the algorithms in a pipeline.
Regarding the VCU1525; the price is $3995 - $4600 USD, this is an incredible deal considering the FPGA on the board costs $40,000. Since Xilinx makes the FPGA they can sell the board for whatever price they want. I am trying to make a deal with Avnet+Xilinx to establish a custom channel for crypto miners to buy VCU1525 at short lead time. Stay tuned in the next few days.