I think you all should try to keep it simple. That increases chances to produce something that is working in time and without multiple iterations for PCB production and assembly (money!). The later this thing is ready probably the higher is mining difficulty, this in the end also costs money.
I couldn't agree more. This is why I don't see the advantage of doing all the work to implement a bus protocol, when USB functionality costs nothing more than an FTDI chip ($3-4). If we're discussing overall strategy here, I think the priority should be on developing the FPGA daughter board. Right now, we're spending this time trying to design the perfect backplane, that will have sorts of cool features and allow for all different types of daughterboards. That's a very difficult task. It's very easy to get bogged down in this design and delay the overall development.
On the other hand, as O_Shovah said, we really shouldn't go back now and rediscuss the issues that have already been decided. It would be better to just try to move ahead with the design.
Is anyone working on the daughterboard schematic and or layout? We could probably get started now and add the bus protocol to it later.