i got the public keccak source and synthesized,not sure whether it can run properly,just evaluation of resources.
i put 24 core and set to 300MHz
so XUVU9P may run 7.2G ,160W power
how can you get 17G?
i can't buy this board personally in my country，and it is embargo on some occasions.
| Device : xcvu9pfsgd2104-2LV
| Design State : Synthesized
---------------------------------------------------------------------------------------------------------
Utilization Design Information
Table of Contents
-----------------
1. CLB Logic
1.1 Summary of Registers by Type
2. BLOCKRAM
3. ARITHMETIC
4. I/O
5. CLOCK
6. ADVANCED
7. CONFIGURATION
8. Primitives
9. Black Boxes
10. Instantiated Netlists
11. SLR Connectivity and Clocking Utilization
12. SLR Connectivity Matrix
13. SLR CLB Logic and Dedicated Block Utilization
14. SLR IO Utilization
1. CLB Logic
------------
+-------------------------+---------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+-------------------------+---------+-------+-----------+-------+
| CLB LUTs* | 1137440 | 0 | 1182240 | 96.21 |
| LUT as Logic | 1137440 | 0 | 1182240 | 96.21 |
| LUT as Memory | 0 | 0 | 591840 | 0.00 |
| CLB Registers | 1729977 | 0 | 2364480 | 73.17 |
| Register as Flip Flop | 1729977 | 0 | 2364480 | 73.17 |
| Register as Latch | 0 | 0 | 2364480 | 0.00 |
| CARRY8 | 434 | 0 | 147780 | 0.29 |
| F7 Muxes | 131 | 0 | 591120 | 0.02 |
| F8 Muxes | 0 | 0 | 295560 | 0.00 |
| F9 Muxes | 0 | 0 | 147780 | 0.00 |
+-------------------------+---------+-------+-----------+-------+